This disclosure relates generally to semiconductor devices, and more specifically three dimensional integrated circuits (3D IC) Many semiconductor integrated circuits (ICs) include analog circuits, such as current mirrors and differential buffers or comparators. To reduce mismatch and improve the source-to-drain resistance (Rout), designers often use a large gate length for active devices (e.g., transistors). In advanced semiconductor processes, device sizes are reduced, including the gate length. The reduction in gate length can increase mismatch and/or affect Rout.